Publications

Complete List of Publications

Journal Papers Under Review

• L. Sassatelli, S. K. Chilappagari, B. Vasic and D. Declercq, "Two-Bit Message Passing Decoders for LDPC Codes Over the Binary Symmetric Channel", submitted to IEEE Transactions on Communications, March 2009
• S. K. Chilappagari, M. Chertkov and B. Vasic, "Provably efficient instanton search algorithm for LP decoding of LDPC codes over the BSC", submitted to IEEE Transactions on Information Theory, September 2008
• S. K. Chilappagari, D. V. Nguyen, B. Vasic and M. W. Marcellin, "Error Correction Capability of Column-Weight-Three LDPC Codes: Part II", submitted to IEEE Transactions on Information Theory original submission July 2008, first revision under preparation
• S. K. Chilappagari, D. V. Nguyen, B. Vasic and M. W. Marcellin, "On Trapping Sets and Guaranteed Error Correction Capability of LDPC Codes and GLDPC Codes", submitted to IEEE Transactions on Information Theory, original submission May 2008, first revision January 2009

Published/Accepted Journal Papers

• S. K. Chilappagari, M. Chertkov, M. G. Stepanov and B. Vasic, "Instanton-based techniques for analysis and reduction of LDPC error-floors", to appear in IEEE JSAC on Capacity Approaching Codes
• S. K. Chilappagari and B. Vasic, "Error Correction Capability of Column-Weight-Three LDPD Codes", to appear in IEEE Transactions on Information Theory, May 2009
• M. Ivkovic, S. K. Chilappagari and B. Vasic, "Eliminating trapping sets in low-density parity check codes by using Tanner graph covers", IEEE Transactions on Information Theory, vol. 54, no. 8, pp. 3763-3768, Aug. 2008

Published Conference Papers

• S. K. Chilappagari, M. G. Stepanov, M. Chertkov and B. Vasic, "Analysis of Error Floors of LDPC Codes under LP Decoding over the BSC", accepted for presentation at ISIT 2009
• L. Sassatelli, S. K. Chilappagari, B. Vasic and D. Declercq, "Two-Bit Message Passing Decoders for LDPC Codes Over the Binary Symmetric Channel", accepted for presentation at ISIT 2009
• S. K. Chilappagari, B. Vasic and M. W. Marcellin, "Guaranteed Error Correction Capability of Codes on Graphs", in Proc. ITA 2009
• S. K. Chilappagari, D. V. Nguyen, B. Vasic, and M. W. Marcellin, "On guaranteed error correction capability of GLDPC codes," in Proc. 44th Annual International Telemetering Conference, 2008
• S. K. Chilappagari, D. V. Nguyen, B. Vasic, and M. W. Marcellin, "On the guaranteed error correction capability of LDPC codes," in Proc. IEEE International Symposium on Information Theory (ISIT '08), July 2008, pp. 434-438
• S. K. Chilappagari, A. R. Krishnan, and B. Vasic, "LDPC codes which can correct three errors under iterative decoding," in Proc. IEEE Information Theory Workshop (ITW '08), May 2008, pp. 406-410
• S. K. Chilappagari, D. V. Nguyen, B. Vasic, and M. W. Marcellin, "Girth of the Tanner graph and error correction capability of LDPC codes," in Proc. 46th Annual Allerton Conference on Communication, Control, and Computing, 2008
• M. Ivkovic, S. K. Chilappagari, and B. Vasic, "Designing LDPC Codes without small trapping sets by using Tanner Graph Covers," in Proc. IEEE International Symposium on Information Theory (ISIT '07), June 2007, pp. 2266-2270
• S. K. Chilappagari, S. Sankaranarayanan, and B. Vasic, "Error floors of LDPC codes on the binary symmetric channel," in Proc. IEEE International Conference on Communications (ICC '06), vol. 3, 2006, pp. 1089-1094
• B. Vasic, S. K. Chilappagari, S. Sankaranarayanan, and R. Radhakrishnan, "Failures of the Gallager B decoder: analysis and applications," in Proc. 2nd Information Theory and Applications Workshop, University of California at San Diego, 2006

Presentations and Invited Talks

• B. Vasic and S. Chilappagari, "Guaranteed error correction of LDPC codes," in ECE-CS Seminar, University of Arizona, Tucson, Arizona, 2008
• B. Vasic, S. K. Chilappagari, and D. V. Nguyen, "Trapping sets and error floor of LDPC codes," ser. EHDR Program Technical Review and INSIC’s Annual Meeting, Monterey, CA, 2007
• S. K. Chilappagari and B. Vasic, "Trapping sets and error floors of LDPC codes on binary symmetric channel," in EHDR Signal Processing Session, INSIC Quarterly Meeting, University of California at San Diego, San Diego, CA, 2006
• B. Vasic, "Trapping sets and error floors of LDPC codes on binary symmetric channel", Ecole Nationale Supérieure de l'Electronique et de ses Applications, ENSEA, Cergy-Pontoise, France, June 2006
• B. Vasic, S. K. Chilappagari, and S. Sankaranarayanan, "Error floor characterization of low-density parity check codes on binary symmetric channel," in IEEE Communication Theory Workshop (CTW 2005), ser. Invited Talk, Park City, Utah, 2005
• B. Vasic, "Error floor analysis of codes on graphs," ser. INSIC EHDR Program Technical Review, Stanford University, Palo Alto, CA, 2005
• S. Sankaranarayanan and B. Vasic, "Understanding decoding failures of LDPC codes," ser. INSIC TAPE Annual Meeting, Monterey, CA, 2005