Verilog By Example

These examples were insipred by the VHDL Tutorial: Learn by Example page which proposes that when students are first learning digital design, students should not be initally be burdened with the intricacies of the underlying hardware description language (such as VHDL or Verilog) utilized. Rather, students should focus on understand the components being modeled and be able to modify examples to achieve the desired functionality.

Additional Resources


Logic Gates


Combinational Circuits

We can describe the following combinational circuits structurally, meaning that we build the following circuits by instantiating various components such as AND, OR, and NOT gates, then specifying the interconnections among them.


Alterntively, we can describe the combinational circuits behaviorally. In a behavioral description the circuits are described by spcecifying their response to the inputs, rather than their interconnetion among instantiated components. Note that only the code changes in these examples. The testbenches remain the same, and the simulation results should also be equivalent.

Common Combinational Components


Sequential Circuits


RTL Design


Created by Susan Lysecky
Last Updated August 8, 2006