Lab 2 - Structural and Behavioral Design of a 3x8 Decoder

In this lab, using the library of basic logic gates you created in Lab 1, you will structurally and behaviorally design a 3x8 decoder using Verilog. After this lab, you should be able to understand the difference between a structural and behavioral design and have insight into when to use each of these design specification techniques.

Lab Procedure

The following provides the steps that you must follow to complete this lab.

1. Structural design a 3x8 decoder with an enable signal, e, by instantiating AND, OR, and INV gates you designed in the previous lab. You should not use an always statement in your structural design. Use the following module template for your decoder design.
   
   

   module decoder3x8_struct(i2, i1, i0, e, d7, d6, d5, d4, d3, d2, d1, d0);
       input i2, i1, i0, e;
       output d7, d6, d5, d4, d3, d2, d1, d0;
   
       // you code goes here
   endmodule

2. Test your structural design by exhaustively simulating all possible input combinations (16 combination in total).
3. Behaviorally design the same 3x8 decoder using a single always procedure. Hint: You can use an if-then-else statement to implement the enable functionality. Use the following module template for your decoder design.
   
   

   module decoder3x8_bhv(i2, i1, i0, e, d7, d6, d5, d4, d3, d2, d1, d0);
       input i2, i1, i0, e;
       output d7, d6, d5, d4, d3, d2, d1, d0;
       reg d7, d6, d5, d4, d3, d2, d1, d0;
   
       always @(i2, i1, i0, e) begin
   
           // your code goes here
   
       end
   endmodule

4. Test your structural design by exhaustively simulating all possible input combinations (16 combination in total). Ensure that your behavioral design behaves the same as your structural design.

Demo

You must demo the following aspects or your decoder designs to the TA.

1. Verilog code for structural 3x8 decoder design.
2. Simulation waveforms demonstrating correct functionality for structural 3x8 decoder design.
3. Verilog code for behavioral 3x8 decoder design.
4. Simulation waveforms demonstrating correct functionality for behavioral 3x8 decoder design.

Lab Report

In addition to the standard lab report format, you must submit the following information.

1. Verilog code for structural and behavioral 3x8 decoder design.
2. Simulation waveforms demonstrating correct functionality for the structural and behavioral 3x8 decoder designs. Your waveforms should be identical.