4. Applications on FPGAs (three active projects)

A) Self-Configurable Architecture for Reusable Space Systems (SCARS)

Funded by: NASA, Jet Propulsion Laboratories, Strategic University Partnership Program (JPL-SURP'07)
JPL Investigator: Adrian Stoica

Students: Adarsha Sreeramareddy, Jeff Josiah, Andrew Lotti, Jeremy Wright, Kevin Carr

Project specifically focuses on developing an architecture in which individual, modular components/subsystems: 1) coordinate their actions for broader range of objectives hence go beyond mission-specific requirements; 2) adapt to changes in mission objectives over time and optimize computing and communication capability; 3) respond to hardware/software anomalies automatically with self-healing action at both node and network levels. We propose a two-level self-healing methodology for increasing the probability of success in critical missions. Our proposed system first undertakes healing at node-level. For that purpose we have developed built-in self-testing and fault detection, isolation and recovery capabilities to offer 100% node availability. Failing to rectify system at node-level, network-level healing is undertaken. Network automatically assigns the task of faulty node to another node in the field. That field node then reconfigures itself to carry out the new task while running its original task. The prototype reconfigurable architecture demonstrates network's capability for self-configuration and each node's capability for self-testing, fault-recovery/repair and computation optimization in the context of image processing.

Publications

• Adarsha Sreeramareddy, Ramachandra Kallam, Aravind R. Dasu, Ali Akoglu , "Self-Configurable Architecture For Reusable Systems With Accelerated Relocation Circuit (Scars-Arc)", IEEE, 17th Reconfigurable Architectures Workshop April 19-20, 2010, Atlanta, USA
• Chad Rossmeissl, Adarsha Sreeramareddy, Ali Akoglu, "Partial Bitstream 2-D Core Relocation for Reconfigurable Architectures", IEEE NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2009), San Francisco, July 2009
• Ali Akoglu, Adarsha Sreeramareddy, Jeff G. Josiah, "FPGA Based Distributed Self Healing Architecture for Reusable Systems", Journal of Cluster Computing (2009), 12: 269-284
• A. Sreeramareddy, J.G. Josiah, A. Akoglu, and A. Stoica, " SCARS: Scalable Self-Configurable Architecture for Reusable Space Systems", IEEE NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2008), pp. 204-210, Noordwijk, Netherlands, June 22-25, 2008
• S. Venishetti, A. Akoglu, R. Kalra, "Hierarchical Built-in Self-testing and FPGA Based Healing Methodology for System-on-a-Chip", IEEE NASA/ESA Conference on Adaptive Hardware and Systems (AHS), pp. 717-724, Edinburgh, UK, Feb 26, 2007

B) Real-Time Crop Monitoring in Greenhouses

The goal of this study is to explore ways to improve the greenhouse based plant production by utilizing new technologies for crop monitoring. As visual sensor network (VSN) applications continue to evolve, the existing node level sensor architectures struggle to manage the large amounts of computation and communication with tight area and energy constraints. With reconfigurable devices such as Field Programmable; Gate Arrays (FPGAs), designers are provided with a seductive tool to use as a basis for developing sensor node architectures that can support increasingly complex VSN application requirements and adapt to multiple sensing functionalities. Our objective is to extend the capabilities of the SCARS prototype as a step towards advancing the field of VSN with innovative sensor architecture design approaches that are adaptive and fault tolerant for VSN applications of the future.

Publications

• Gregory Striemer, David Story, Ali Akoglu, and Murat Kacira, "A node and network level self-recovering distributed wireless sensor architecture for real-time crop monitoring in greenhouses," Transactions of the American Society of Agricultural and Biological Engineers (ASABE), vol. 54, no. 4, pp. 1521-1577, 2011
• David Story, Murat Kacira, Chieri Kubota, Ali Akoglu, Lingling An, "Lettuce calcium deficiency detection with machine vision computed plant features in controlled environments", Computers and electronics in agriculture, Vol 74, issue 2, November 2010, ISSN 0168-1699
• Gregory Striemer, Ali Akoglu, Murat Kacira , "A Node and Network Level Self-Healing Distributed Wireless Sensor Architecture for Greenhouse based Plant Monitoring Systems", American Society for Agricultural and Biological Engineers (ASABE), Annual International Meeting June 20-23, 2010 Pittsburgh, Pennsylvania
• Story, D., M. Kacira, C. Kubota. A. Akoglu. "Autonomous plant health/growth monitoring with machine vision in controlled environments", Annual International Meeting of American Society of Agricultural and Biological Engineers (ASABE'09), Reno, Nevada, June 21-24 2009
• Story, D., M. Kacira, C. Kubota and A. Akoglu, "Morphological and Textural Plant Feature Detection Using Machine Vision for Intelligent Plant Health, Growth and Quality Monitoring", International Symposium on High Technology for Greenhouse System (GreenSys'09), , Quebec, Canada, June 13-18, 2009
• Story, D., M. Kacira, A. Akoglu and C. Kubota, "A Machine Vision Guided System for Plant Health and Growth Monitoring in Controlled Environment Agriculture Production", International Society for Horticultural Science (ISHS), International Workshop on Greenhouse Environmental Control and Crop Production in Semi-Arid Regions, Tucson, AZ , Oct 20-24 2008
  

C) Physically Unclonable Function based Partial Bitstream Authentication Architecture (Student: Janhavi Sabnis)

FPGAs with the partial reconfiguration (PR) capability play a crucial role in designing adaptive hardware systems. FPGA vendors do not offer support for partial bitstream authentication, which is a concern for mission critical systems. We approach this problem by examining the Physically Unclonable Function (PUF) technology and developing a PUF based PR bitstream authentication architecture. Field Programmable Gate Arrays (FPGAs) offer run-time partial reconfiguration (PR) capability, which is a preferred feature for adaptive hardware systems. However, PR bitstreams are protected with an encryption-only capability leaving the mission-critical system vulnerable if the bitstream is compromised. Physically Unclonable Functions (PUFs) take advantage of inherent process variations to protect the system against intellectual property theft attacks. In this study, we investigate the PUF technology for designing a partial bitstream authentication architecture. Our objective is to reduce the authentication time and resource usage of the security module for applications that require run-time adaptive systems

Adaptable Low Density Parity Check (LDPC) Engine (expired)

Space communication systems are characterized by the severe limitations to the on-board computational power and the tight constraints of received signal strengths. Also, these communication systems observe degradation in signals caused by large propagation latencies, extreme distances traveled, as well as data corruption causing high bit-error rates. LDPC codes provide state of the art error correction capability where signal power is very low, making them an ideal candidate for space based applications. A hardware architecture that is configurable to dynamic changes in channel conditions is a necessity for error resilient communication systems. In this project we study the feasibility of designing an FPGA based adaptable LDPC decoder architecture that also matches the throughput demand of current space based communications requirements. We design an LDPC engine that is adaptable to three code rates by taking advantage of the partial reconfiguration technology and parallel nature of the FPGA architecture. We evaluate the tradeoff between the level of parallelism to exploit on the FPGA when implementing LDPC codes and resource demand for each code rate under the constraints of delivering a partially reconfigurable and adaptable solution.

Publications

• Gregory Striemer, Ali Akoglu, "An Adaptable Low Density Parity Check (LDPC) Engine for Space Based Communication Systems", IEEE NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2010) June 15-18, 2010 Anaheim California

FPGA Based Image Reconstruction (expired)

Funded by: University of Arizona, Faculty Small Grants Program

Student: Arjun Hari

Compressed Sensing (CS) theory promises a quantum leap forward in many areas of signal processing. One of its important application areas is medical imaging. However, extremely long reconstruction times make it both impractical for clinical use and problematic for further research. Configurable computers based on Field Programmable Gate Array (FPGA) hardware are capable of accelerating suitable applications by several orders of magnitude. Our objective is to develop a CPU-FPGA integrated engine tailored to the computational characteristics of CS reconstruction theory for medical image reconstruction. We expect that proposed tools will also be portable to other application areas of CS theory.