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Associate Professor,
Electrical and Computer Engineering Department

Associate Professor,
BIO5 Institute

Office phone: (520) 626-5149
Fax:(520) 621-8076
e-mail: akoglu .at.ece.arizona.edu

Dr. Ali Akoglu is the director of the Reconfigurable Computing Lab, UA site director of the NSF Center for Cloud and Autonomic Computing, and director of the NVIDIA CUDA Teaching Center. He received his Ph.D. degree in Computer Science from the Arizona State University in 2005. Dr. Akoglu is an expert in high performance scientific computing and parallel computing with a primary focus on restructuring computationally challenging algorithms for achieving high performance on field programmable gate array (FPGA) and graphics processing unit (GPU) hardware architectures. He has been involved in many crosscutting collaborative projects with the goal of solving the challenges of bridging the gap between the domain scientist and highly-parallel hardware architectures under the umbrella of organizations such as the BIO5 Institute and CYVERSE. His research projects have been funded by the National Science Foundation, US Air Force, NASA Jet Propulsion Laboratories, Army Battle Command Battle Laboratory, and industry partners such as Nvidia and Huawei.

 

During 2019-2020 academic year I am on sabbatical leave.

Undergraduate Research Assistant Positions for Fall 2019-Spring 2020

  • Two undergraduate research assistant positions are available on exploring the applications of the neuromorphich computing. For further information please refer to the project overview document.
  • 2 REU Positions in NSF Center for Cloud and Autonomic Computing at UA Site  available related to the current projects on: (1) High Performance Machine Learning Based Data Analytics abd (2) Modeling Composable Data Center and Resource Management Strategies.  For further information please refer to the project overview document.

RA Positions for Fall 2019 or Spring 2020

  • Domain-Focused Advanced Software-Reconfigurable Heterogeneous System on Chip (DASH-SoC): The overall goal of this four year project is to develop a heterogeneous SoC comprised of many cores that mix general-purpose processors, special-purpose processors, hardware accelerators, memory, and input/output (I/O). For further information please refer to the project overview document.  

Interested in joining my "Reconfigurable Computing" research group? You may also want to check out what I am looking for in candidates by following this link.

 

 

General | CVResearch | Teaching