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Associate Professor,
Electrical and Computer Engineering Department

Associate Professor,
BIO5 Institute

Office phone: (520) 626-5149
Fax:(520) 621-8076
e-mail: akoglu .at.ece.arizona.edu

Dr. Ali Akoglu is the director of the Reconfigurable Computing Lab, UA site director of the NSF Center for Cloud and Autonomic Computing, and director of the NVIDIA CUDA Teaching Center. He received his Ph.D. degree in Computer Science from the Arizona State University in 2005. Dr. Akoglu is an expert in high performance scientific computing and parallel computing with a primary focus on restructuring computationally challenging algorithms for achieving high performance on field programmable gate array (FPGA) and graphics processing unit (GPU) hardware architectures. He has been involved in many crosscutting collaborative projects with the goal of solving the challenges of bridging the gap between the domain scientist and highly-parallel hardware architectures under the umbrella of organizations such as the BIO5 Institute and CYVERSE. His research projects have been funded by the National Science Foundation, US Air Force, NASA Jet Propulsion Laboratories, Army Battle Command Battle Laboratory, and industry partners such as Nvidia and Huawei.

 

In Spring 2018, I will be teaching ECE569: High Performance Computing and Architectures

In this class, we investigate the high performance computing systems with a focus on GPU architecture and its programming environment through series of CUDA based programming on a P100 based cluster. You may refer to the Course Overview document and also ECE569 Spring 2017 Syllabus to get an idea about the course.
I plan to make changes to the topics to increase the time spent on CUDA programming in the classroom.

In Fall 2018, I am teaching ECE369A: Fundamentals of Computer Organization

Office Hours

Fridays 11:00-1:00 in ECE302 Lab

ULA Positions for Spring 2018-Spring 2019

  • Several undergraduate lab assistant positions are available on exploring the applications of the TrueNorth chip. Required background: FPGA based design using Verilog HDL and post routing simulation preferably with Xilinx Vivado

RA Positions for Fall 2018

  • Neuromorphic Computing: We are interested in exploring the applications of the TrueNorth chip, and conducting research on the next generation low-power intelligent computing systems through the design and development of innovative hardware and software techniques for connecting the neurons and adapting their connections to the nature of the sensed data. The outcomes of this project will include models and methods for designing composable building blocks rapidly and proof-of-concept prototypes of hardware and software mechanisms that will form the foundations for transitioning to practical use in real-time applications.
  • High Performance Computing: Project involves design and development of resource management heuristics at HPC scale under power constraints.
    Required Background: Excellent Algorithms and Data Structures Knowledge
    Programming Skills: C/C++, CUDA, MPI

Interested in joining my "Reconfigurable Computing" research group? You may also want to check out what I am looking for in candidates by following this link.

 

 

General | CVResearch | Teaching